An Interview with Jake Baker

From The Amp Hour Electronics Podcast The Amp Hour (Chris Gammell and David L Jones)

Welcome Dr. Jake Baker!

Jake is currently a professor at UNLV and teach mixed signal chip design.
Reticles/Mask sets are $10M+, so big companies are risk averse.
Jake has a total of 142 patents, about 50 of which were non-lawyer changes.
He also regularly acts as an expert witness for cases.
Chris asked about the RamBus RDRAM, because it was so expensive for his old computer.
One of Jake's early job was working on projects funded by Reagan's StarWars program.
This included some of the Nevada nuclear test sites from 1985 into the 90s
After that Jake landed at Boise and Micron working on DRAM/SDRAM. This includes work on some of the early DDR memory.
Later he consulted on a large (older) process CMOS imagers when .
A new thing coming out is Resistive memory. Intel and Micron recently announced it will be moving towards production. This is somewhat like the theoretical memristor, propsed by Leon Chua in the 70s.
Jake also worked on research for the Field Emitting Display, which worked like a miniturized CRT.
On the CMOSedu site, there are a bunch of course videos, but Jake will also be investigating further online education models for his courses as part of the university.
Jake's latest designs use a 130 nm SiGe process.
The students Jake advises use MOSIS, which is part of the USC Info science institute. They get 2.5x2.5 mm chips on the 500 nm node. It costs $6K for 40 chips not in packaging.
Unfortunately, most fabs only release Process Design Kits (PDKs) for Cadence. This means that Jake primarily teaches Cadence (so students are marketable upon graduation).
In the past, he has taught using the free/open source Electric VLSI, which is Java based. Students around the world have learned from his videos on the subject.
There are a range of books that Jake suggest for design, such as CMOS VLSI by Harris and Weste. However, he also has written two books on the subject!
The future is designing modules on chip (SOC) because of the scale of many designs.
There is a section of CMOSedu that is similar to the AoE, that talks about "Bad Designs"

You can find Jake on his homepage and get in contact with him there. Definitely dive down into all the great content he has made for his students and the world! Thanks to Jake for being on the show.